1. Technical Field
The invention relates to a semiconductor device and particularly to a semiconductor device including a nonvolatile memory having a floating gate electrode.
2. Related Art
As one of the nonvolatile memory devices, there is cited a nonvolatile memory device of a stack gate type which is constituted by a floating gate electrode provided on a semiconductor layer through an insulation layer, further, a control electrode provided on the floating gate electrode through the insulation layer, and a source region and a drain region provided on the semiconductor layer. In such nonvolatile memory device of the stack gate type, a write operation and an erase operation are performed by impressing a preset voltage on the control gate and the drain region and by injecting or releasing an electron into or from the floating gate electrode.
However, in such nonvolatile memory device of the stack gate type, there is an increase in a number of steps because of a gate electrode forming step of two times, and it is necessary to form a thin-film insulation layer on the floating gate electrode, so that a manufacturing process becomes cumbersome.
Hence, by comparison to the nonvolatile memory device of the stack gate type, as a nonvolatile memory device which can be manufactured by a simple manufacturing process and at low cost, there is proposed a nonvolatile memory device which is referred to in related art.
The nonvolatile memory device disclosed in JP-A-63-166274 has a control gate which is an n-type impurity region in the semiconductor layer and the floating gate electrode consists of a conductive layer such as a one-layer polysilicon layer (referred to as the “one layer gate type nonvolatile memory device). An advantage of such one-layer gate type nonvolatile memory device is that since there is no need to stack one gate electrode over another gate electrode, it can be formed in the same way as a currently available CMOS transistor process.
JP-A-63-166274 is an example of related art.